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CHIP RAM64 {
    IN in[16], load, address[6];
    OUT out[16];

    PARTS:
    DMux8Way(in=load, sel[0..2]=address[3..5], a=r0, b=r1, c=r2, d=r3, e=r4, f=r5, g=r6, h=r7);
    RAM8(in=in, load=r0, address=address[0..2], out=reg0);
	RAM8(in=in, load=r1, address=address[0..2], out=reg1);
	RAM8(in=in, load=r2, address=address[0..2], out=reg2);
	RAM8(in=in, load=r3, address=address[0..2], out=reg3);
	RAM8(in=in, load=r4, address=address[0..2], out=reg4);
	RAM8(in=in, load=r5, address=address[0..2], out=reg5);
	RAM8(in=in, load=r6, address=address[0..2], out=reg6);
	RAM8(in=in, load=r7, address=address[0..2], out=reg7);
	Mux8Way16(a=reg0, b=reg1, c=reg2, d=reg3, e=reg4, f=reg5, g=reg6, h=reg7, sel=address[3..5], out=out);
}